Verification of CAM Tests for Input Stuck-at Faults.

P. R. Sidorowicz and J. A. Brzozowski

Abstract

A comparison of three tests applied to an n-word by l-bit static CMOS content-addressable memory (CAM) array is performed, with respect to the cell input stuck-at fault model. We briefly review the methodology facilitating this comparison, and the proof of correctness of the Sidorowicz & Brzozowski test, of length 7n+2l+5, which was derived using this methodology. Then, we examine the Giles & Hunter test and demonstrate that it fails to detect bit-sa-0 and not-bit-sa-0 faults. We also show how this test can be modified to a test, of length 11n+2l, that detects these faults. Next, we verify that the Kornachuk et al. test, which is of length 24nl and is used in BIST, detects all the faults in the fault model.

Keywords

CMOS CAM, fault modeling, stuck-at faults, testing, verification.

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